SEAforth® 40C18

SEAforth-24A Chip

Scalable Embedded
      Array™ Processor

   Compiler and Simulator Downloads

    •   VentureForth® S40C18

   Document Downloads

    •   NEW SEK 40C18 DataSheet 1.1

    •   NEW SEK 40C18 Schematic

    •   SEAforth® 40C18 Product Brief
    •   SEAforth® 40C18 Device Data Sheet 
    •   VentureForth® Programmers Guide




  • Forty C18 core processors capable of up to 25 billion operations per second
  • Fully asynchronous for fast processing, low power
  • External memory interface
  • SPI, serial, and parallel ports
  • 2 SERDES ~400 Mbit
  • Three 18-bit A/D converters
  • Three 9-bit D/A converters
  • Zero-overhead inter-processor communication and synchronization

C18 Computer

  • 18-bit stack-oriented computer
  • Runs VentureForth® language as native code
  • Executes one ALU operation per cycle
  • Zero-overhead inter-processor communication and synchronization
  • 64 words RAM / 64 words ROM
  • <9 mW per core at full speed
  • Automatic sleep mode at <5 µW per core

Target Applications

  • Consumer audio processing
  • Wireless devices
  • Home automation
  • Remote data collection and processing
  • Security applications
  • Battery powered portable medical devices
  • Industrial control and instrumentation
  • Automotive control
  • Sound processing


The SEAforth 40C18 is one of the IntellaSys® Scalable Embedded Array   multicore processors. It has an array of 40 cores; each of the C18 cores is   a complete computer, with its own ROM, RAM, and interprocessor communication. Together they can deliver up to 26 billion operations per second. The SEAforth 40C18 is a perfect embedded computer solution for consumer applications that demand high processing power and low power dissipation.

With 40 nodes to work with, designers can dedicate groups of them to specific tasks such as FFT and DFT algorithms.  The result is a tightly coupled, extremely versatile user-defined group of dedicated processors assigned to specific tasks. Some can be doing highly compute-intensive audio  processing, while others handle wireless interfaces, external memory, and user interface functions. And since each core has its own ROM and RAM, there is less need to go to external memory.

Each core runs asynchronously, at the full native speed of the silicon. During interprocessor communication, synchronization happens automatically;  the programmer doesn’t have to create synchronization methods. Communication happens between neighbors through dedicated ports.  A core waiting for data from a neighbor goes to sleep, dissipating less than one microwatt.  Likewise, a core sending data to a neighbor not ready to receive it goes to sleep until that neighbor accepts it.

I/O ports on the SEAforth 40C18 are highly configurable because they are controlled by firmware.  The 4-wire SPI port, the 2-wire serial ports, and the single-bit GPIO ports can be programmed to perform a large variety of functions.  With the available processing power, wireless solutions become possible without the need for separate wireless chips. Ports can be programmed to support I2C, I2S, asynchronous serial, or synchronous serial ports.  Serial ports can also be used to connect multiple SEAforth S40C18s.


© 2010 IntellaSys, A TPL Group Enterprise.